IOMMU in a nutshell

In the context of a hypervisor, drivers need to access I/O devices. However, the typical I/O overhead is significant, often exceeding 50%, mainly due to the data buffer copying cost. To mitigate this cost, a widely adopted approach is to use “direct memory access” (DMA). DMA allows the guest operating systems and I/O devices to share the main memory, facilitating data exchange between them. However, a concern arises from the fact that all guest operating systems share the same memory area, potentially leading to security issues.

To address this concern and overcome these issues, a memory guardian known as the “memory management unit” (MMU) comes into play. The MMU provides support to manage memory and prevent unwanted access. When it specifically applies to I/O devices, this hardware component is referred to as an “IOMMU” (Input-Output Memory Management Unit); on ARM architecture, it is termed “SMMU.”

The IOMMU offers two key functionalities:

  1. DMA remapping for PCI address transactions
  2. Interrupt remapping, allowing to directly route interrupt to the guest OSs

The necessary information for the driver is available through the „Advanced Configuration and Power Interface“ (ACPI).

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