PCIe in a nutshell

Peripheral Component Interconnect Express (PCIe) is

  • a serial (data is sent in series i.e. one after the other),
  • point-to-point (from device to device),
  • wired (silicon based),
  • individually clocked (time synchronized between devices),
  • lane based (see below),
  • upstream and downstream simultaneously (full-duplex) interconnection.

A connection between a PCIe device and a PCIe switch is called a “link“. In analogy with e.g., MQTT acts the PCIe switch acts as a broker, the link is something like a topic.

Each link is composed of one or more lanes. A link with one lane is called x1, with two lanes x2, up to x16 (in PCIe generation V4.0). The communication happens in so called transactions – in analogy to DDD it is something like “commands”. Transactions support quality of service (QoS) constraints in respect to prioritization – real-time streaming packets (i.e., a video stream required for automotive AD functionality).

Due to the transactions PCIe not (mandatory) require interrupts. Interrupts tell the operating system (OS) that it has to take care of something e.g., the device buffer is full and need to be handled by a program / routine (Interrupt Servicing Routine; in short ISR). Interrupts could be hardware (silicon based, legacy) or software (caused by programs, specific event messages in a protocol, in PCIe called Message Signaled Interrupt or short MSI).

MSI is very handy and allows for great reduction of silicon, but

  • increase latency (in respect to clock cycle)
  • increase power consumption

All kind of interrupts, in PCIe, are used to notification about some event which is sent from one (PCIe) device/ agent to another. Often used/ required for customized messages.

PCIe per specification support/ provide definitions for the following ISO/OSI layer

  • Application layer = no
  • Presentation = no
  • Session = no
  • Transport = yes , the afore mentioned transactions
  • Network = yes, the afore mentioned QoS (incl. error correction)
  • Data link = yes, the afore mentioned links
  • Physical = yes, the silicon provider

For the 3 missing layers specific OS drivers are required. In comparison to ethernet protocols this lead to missing user space protocols such as HTTP.

For the transaction layer the following external web site gives a well overview:

https://www.geocities.ws/pciexpressbus/TransactionLayer.htm

Basic transaction types are

  • read
  • write
  • base line (messages to carry data)
  • vendor specific

Transactions happen on different address spaces:

  • Memory: Transfer data to or from a location in the system memory map
  • IO: Transfer data to or from a location in the system IO map
  • Configuration: Transfer data to or from a location in the configuration space.
  • Messages: to notify events e.g., interrupts or vendor specific

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